Embedded Firmware Architecture
AZJ Smart firmware architecture is designed for deterministic behavior, long-term maintainability, and reliable operation in embedded sensing systems.
Architecture Overview
The embedded firmware used in AZJ Smart sensing modules serves as the core control layer between radar hardware, signal processing pipelines, and external system interfaces.
The architecture emphasizes stability, modularity, and predictable timing behavior, ensuring suitability for continuous operation in building automation and industrial environments.
Design Principles
- Deterministic task execution and timing control
- Clear separation between hardware abstraction and application logic
- Modular software components with defined responsibilities
- Long-term firmware maintainability and version traceability
- System stability under continuous 24/7 operation
RTOS-Based Framework
AZJ firmware architectures are typically built upon a real-time operating system (RTOS) to manage concurrent tasks and time-critical radar operations.
The RTOS layer provides scheduling, synchronization, and resource management, allowing predictable behavior even under varying sensing and communication loads.
Task Scheduling
Priority-based task execution for radar processing, system monitoring, and communication handling.
Inter-Task Communication
Message queues and synchronization primitives for safe data exchange between functional modules.
Timing Control
Deterministic timing for radar frame acquisition and signal processing pipelines.
Firmware Layer Structure
The firmware is structured in distinct layers to isolate hardware dependencies from application logic and system-level behavior.
| Layer | Function |
|---|---|
| Hardware Abstraction Layer (HAL) | Direct interaction with radar ICs, peripherals, GPIO, and low-level drivers. |
| Radar Control Layer | Configuration and control of radar operation modes, frame timing, and data acquisition. |
| Signal Processing Layer | Execution of filtering, FFT processing, motion extraction, and feature generation. |
| Application Logic | Presence detection logic, state machines, and decision-making algorithms. |
| Interface & Communication Layer | Data output, configuration interfaces, and system integration communication. |
Radar Signal Processing Pipeline
Firmware manages the complete radar signal pipeline, from raw data acquisition to high-level sensing output.
- Radar frame triggering and synchronization
- Raw ADC data acquisition
- Digital filtering and noise suppression
- Frequency-domain and time-domain analysis
- Feature extraction for motion and presence detection
Firmware Update & Maintenance
Firmware architectures are designed to support controlled updates and long-term maintenance throughout the product lifecycle.
Version management, backward compatibility, and configuration consistency are considered essential engineering requirements.
System Integration Considerations
The firmware architecture is designed to integrate seamlessly into higher-level control systems, providing stable interfaces and predictable behavior.
This allows OEMs and system integrators to design reliable solutions without dependency on undocumented firmware behavior.
Architecture Boundary
Firmware responsibilities are clearly defined to avoid overlap with external system logic. Application-level decision making remains configurable at the system integration level.